The desire to integrate many circuits, both analog and digital, onto a single IC means using CMOS technologies with very small geometries. As transistor sizes shrink, more circuits can be integrated using the same amount of silicon area. However, as the transistor size shrinks, so does the maximum voltage across which the devices can safely operate. As the supply voltage approaches the signal amplitude, the challenges in circuit design increase dramatically.
Prior technology uses complementary inputs (PMOS and NMOS) to extend the input range, which results in variations in the input transconductance across the input CM range. This affects design paramters such as gain, speed, and noise. Additionally, this requires matching of device parameters across process and temperature. Given a specific supply voltage, a common-mode input range (CMIR) is defined as the range of input voltages over which the circuit can operate correctly. The required CMIR may include much of the available supply voltage.
The operational amplifier (OPAMP) is a basic building block utilized in many analog and mixed-signal systems. The OPAMP is a high-gain differential amplifier. Critical design parameters include: gain, frequency response, output swing, linearity, noise offset, supply rejection, common-mode feedback, and slew rate. In many applications the common-mode input level to the OPAMP will vary over a wide range. The design parameters should be satisfied over the entire common-mode input range of the OPAMP. Thus one would desire to extend the common-mode input range of an OPAMP such that the design parameters do not degrade within this extended range.
Many operational amplifiers (op amps) use rail-to-rail circuit techniques which allows the CMIR to include the entire supply voltage. These topologies often employ two input stages, one for operation near each supply voltage. One input stage will use a PMOS differential pair and the other will use a NMOS differential pair. Because the transconductances of these two input pairs are not matched and will not track each other over process variations, the linearity of the overall amplifier is degraded, and high performance is difficult to achieve.
Another op amp topology often chosen for it's high CMIR is the folded-cascode topology. The folded-cascode circuit often allows the common mode input voltage to reach the negative supply, usually ground in low supply voltage circuits, without any problems. However, in unity gain buffer configurations, where the inverting op amp input is tied to the output, it is the output which will limit the voltage swing.
Although the linearity of the folded-cascode op amp is better than the typical rail-to-rail designs, it still has linearity problems. As the common mode input voltage changes, which will in turn change the gain of the stage. The stage gain varies as a function of the input stage transconductance times the output resistance.